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        3D集成電路將如何同時實現?

        ——
        作者: 時間:2009-03-18 來源:半導體國際 收藏

          Author Information

        本文引用地址:http://www.104case.com/article/92517.htm

          Philip Garrou consults in the areas of thin-film microelectronics, IC packaging and materials for microelectronics. He was previously global director of technology and new business development of Dow Chemical's Advanced Electronic Materials business. Garrou is a Fellow of IEEE and IMAPS, and has served as president of the IEEE Components, Packaging and Manufacturing Technology Society (CPMT) and IMAPS. He has a B.S. in chemistry from North Carolina State University and a Ph.D. in chemistry from Indiana University. e-mail: philgarrou@att.net

          References

          1. A. Braun, “Low-k Bursts Into the Mainstream…Incrementally,” Semiconductor International, May 2005, p. 41.

          2. K. Saraswat, “ IC's: Motivation, Performance Analysis and Technology,” Architectures for Semiconductor Integration & Packaging, Phoenix, June 2005.

          3. S. Vitkavage and K. Monnig, “ Interconnects and the IRTS Roadmap”, Proc. 3D Architecture for Semiconductor Integration and Packaging Conf., Phoenix, 2005.

          4. J.A. Davis et al., “Interconenct Limits on Gigascale Integration in the 21st Century”, Proc. IEEE, Vol. 89, 2001, p. 305.

          5. P. Garrou, “3D Integration Invades Whitefish Montana,” Perspectives From the Leading Edge, Sept. 7, 2007.

          6. P. Morrow et al., “Design and Fabrication of 3D Microprocessors,” MRS Proc., Vol. 970, Enabling Technologies for 3D Integration, C.Bower, P. Garrou, P. Ramm, K. Takahashi Eds., 2007, p. 91.

          7. P. Garrou, “Future ICs Go Vertical,” Semiconductor International, February 2005, p. SP10.

          8. P. Garrou, “3D IC Integration: Evolution or Revolution?”, Perspectives From the Leading Edge, March 16, 2008.

          9. P. Garrou, “ASET Drives 3D Integration Workshop in Tokyo,” Perspectives From the Leading Edge, June 21, 2008.

          10. P. Garrou, “Going Vertical in Whitefish,” Sept. 9, 2007; “High Throughput Laser Drilling for 3D IC TSV,” Feb. 17, 2008, Perspectives From the Leading Edge.

          11. P. Garrou, “3D Equipment & Materials Vendors Consortium,” Perspectives From the Leading Edge, Aug. 26, 2007.

          12. P. Garrou, “3D Practitioners Assemble at Fort McDowell,” Perspectives From the Leading Edge, March 23, 2008.

          13. P. Garrou, “NXP Proposes Passive Integration in 3D IC Stacks,” Perspectives From the Leading Edge, April 13, 2008.

          14. P. Garrou, “More 3D Integration at ECTC 2008,” Perspectives From the Leading Edge, June 28, 2008.

          15. P. Garrou, “If It's Thursday It Must Be San Jose,” Perspectives From the Leading Edge, June 8, 2008.

          16. D.M. Jang et al., 57th Electronic Component Tech. Conf. 2007, p. 847.

          17. P. Garrou, “3D Road Tour Continued,” Perspectives From the Leading Edge, May 28, 2008.

          18. Handbook of 3D Integration, P. Garrou, P. Ramm & C. Bower Eds., Wiley-VCH.


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