基于CPLD的單片機PCI接口設計

VARIABLE
decoder : 16dmux;
mycounter : abelcounter;
pci_c[NextPage]本文相關DataSheet：MAX7000 EPM7128
be : 8DFFE;
PCI_address0 : 8DFFE;
pci_datas0 : 8DFFE;
pci_request[6..0] : mylatch1;
pci_request7 : mylatchc;
pci_data0 : mylatch8;
pci_data1 : mylatch8;
pci_data2 : mylatch8;
pci_data3 : mylatch8;
ss : MACHINE OF BITS (FRAME0,IRDY0)
WITH STATES(s0 = B11,
s1=B01);
s2=B10;
S3=B11);
BEGIN
decoder.(d,c,b,a)=P2[6..3];
enareg[]=decoder.q[];
pci_che.ena=enareg[0]p2[7];
pci_cbe.d[]=p0[];
pci_cbe.clk=!WRITE0;
pci_address0.ena=enareg[1]p2[7]l
pci_address0.d[]=P0[];

pci_datas0.ena=enareg[9]P2[7];
pci_datas0.d[]=P0[];
pci_datas0.clk=!WRITE0;
pci_data0.gate=!TRDY0;
pci_data0.data[]=AD[7..0];
pci_data1.gate=!TRDY0;
pci_data1.data[]=AD[15..8];
pci_data2.gate=!TRDY0;
pci_data2.data[]=AD[23..16];
pci_data3.gate=!TRDY0;
pci_data3.data[]=AD[31..24];
pci_request[3..0].gate=!TRDY0;
pci_request7.gate=!TRDY0;
pci_request7.aclr=P2[7]!WRITE0;
pci_request[3..0].data=CBE[];
pci_request[4].data=IRDY0;
pci_request[5].data=FRAME0;
pci_request[6].data=Vcc;
pci_request7.data=Vcc;
eread=P2[7]!READ0 WRITE0;
my_P0_data0[].in=pci_data0.q[];
my_P0_data0[].oe=enareg[5]eread;
my_P0_data1[].in=pci_data1.q[];
my_P0_data1[].oe=enareg[6]eread;
my_P0_data2[].in=pci_data2.q[];
my_P0_data2[].oe=enareg[7]eread;
my_P0_data3[].in=pci_data3.q[];
my_P0_data3[].oe=enareg[8]eread;
my_P0_request[6..0].in=pci_request[6..0].q;
my_P0_request[7].in=pci_request7.q;
my_P0_request[].oe=enareg[13]eread;
out_P0[]=my_P0_data0[];
out_P0[]=my_P0_data1[];
out_P0[]=my_P0_data2[];
out_P0[]=my_P0_data3[];
out_P0[]=my_P0_request[];
P0[]=out_P0[];
enclr=enareg[0]P2[7]!WRITE0;
mycounter.clock=CLK;
mycounter.cnt_en=!IRDY0;
mycounter.aclr=!FRAME0;
mycounter.sset=!TRDY0;
ss.clk=!CLK;
ss.reset=enclr;
ss.ena=Vcc;
CASE ss IS
WHEN s0 => ss=s1;
WHEN s1 => ss=s2;
WHEN s2 => IF mycounter.cout THEN ss =s3;ELSE ss=s2;
END IF;
WHENf s3 => ss=s3;
END CASE;
my_AD_address[7..0].in=in=pci_[NextPage]本文相關DataSheet：MAX7000 EPM7128
address0;
my_AD_address[31..8].in=GND;
my_AD_address[31..0].oe=!FRAME0;
my_CBE_c[].in=PCI_cbe.d[3..0];
my_CBE_c[].oe=!FRAME0;
my_AD_data[31..0].in=pci_datas0.q[8..1];
my_AD_data[31..0].oe=pci_cbe_[0]FRAME0;
my_CBE_be[].in=pci_cbe.d[7..4];
my_CBE_be[].oe=FRAME0;
out_AD[]=my_AD_address[];
out_AD[]=my_AD_data[];
AD[]=out_AD[];
out_CBE[]=my_CBE_c[];
out_CBE[]=my_CBE_be[];
CBE[]=out_CBE[];
END;