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        s3c6410 DMA 實現(入門級)

        作者: 時間:2016-11-11 來源:網絡 收藏
        char src[200] = "abcdefghigklmn123456n";

        char dest[200] = "kkkkn";

        本文引用地址:http://www.104case.com/article/201611/316682.htm

        void dma_init(void)
        {
        DMACConfiguration = 1; //開總的DMA 使能
        DMACC7SrcAddr = (int)src; //給源地址寄存器賦源地址
        DMACC7DestAddr = (int)dest;//給目標地址寄存器賦目的地址
        DMACC7Control0 = 0x0c000000; //【26】【27】位置1,使源地址和目標地址在發送后遞增
        DMACC7Control1 = 0x64; //寫入拷貝的size;
        DMACC7Configuration |= 1<<0; //開channel7 DMA
        }

        main()

        {

        dma_init();
        delay();
        my_puts("----------------n");
        my_puts(src);
        my_puts(dest);

        }

        之后打印出的src和dest內容相同

        6410手冊中操作DMA的編程步驟:

        Steps to program a DMA channel:

        1. Decide whether use secure DMAC(SDMAC) or general DMAC(DMAC). In order to use general DMAC,

        disable secure DMA control register(SDMA_SEL) of system controller. (Reset value is SDMAC)

        2. Select a free DMA channel with the priority needed. Where DMA channel 0 has the highest priority and DMA

        channel 7 the lowest priority.

        DMACCXCONFIGURATION

        DMACC7Configuration 【0】位值1

        3. Clear any pending interrupts on the channel to be used by writing to the DMACIntTCClr and DMACIntErrClr

        registers. The previous channel operation might have left interrupts active.

        4. Write the source address into the DMACCxSrcAddr register.

        5. Write the destination address into the DMACCxDestAddr register.

        6. Write the address of the next LLI into the DMACCxLLI register. If the transfer comprises of a single packet of

        data then must be written into this register.

        Offset Contents

        Next LLI address Source Address for next transfer

        Next LLI address + 0x04 Destination Address for next transfer

        Next LLI address + 0x08 Next LLI address for next transfer

        Next LLI address + 0x0C DMACCxControl0 data for next transfer

        Next LLI address + 0x10 DMACCxControl1 data for next transfer

        7. Write the control information into theDMACCxControlregister.

        DMACCxControl0

        DMACCxControl1 transfer size

        8. Write the channel configuration information into the DMACCxConfiguration register. If the Enable bit is set

        then the DMA channel is automatically enabled.



        關鍵詞: s3c6410DM

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